Build a 4-bit linear-feedback shift register (LFSR) .

An LFSR is essentially a shift register where a few of the bits are set to result of XOR-ing other bits in the register. This results in the shift register producing a pseudo-random series of numbers. With careful construction, the pattern can be made to cycle through all possible combinations of bits (except for all 0s) before repeating.

Your 4-bit LFSR should use the design below. When reset, the value should be 0001.

library IEEE; use IEEE.std_logic_1164.all; entity lfsr4 is port( clk : in std_logic; reset : in std_logic; count : out std_logic_vector(3 downto 0) ); end lfsr4; architecture synth of lfsr4 is begin count <= "0000"; end;

Are you confident about this change? (select one to recompile)

Compiler/test output: