Just as it's helpful to define intermediate variables in a software program, it is often useful to define intermediate signals to represent part of a hardware computation.
Declaring a signal is just like declaring an input or output port, except that it happens at the top of the architecture, and begins with the keyword
architecture synth of adderlogic is signal onebit : std_logic; signal mybus : std_logic_vector(2 downto 0); begin -- regular architecture end;
Implement a 3-bit adder without using the addition operator, by writing boolean assignments for each bit. A and B are 3-bit inputs; the result should be a 4-bit output (so there should be no overflow.)
Use intermediate signals for the carry bits.
Are you confident about this change? (select one to recompile)