Build an 8-bit one-hot counter (i.e., one bit is high at a time, counting up from the LSB to the MSB and then repeating).
When reset, the value should be 0000_0001.
entity onehot is
clk : in std_logic;
reset : in std_logic;
count : out std_logic_vector(7 downto 0)
architecture synth of onehot is
count <= "00000000";