Fill in the architecture to build a simple ALU. The operands are 4 bits each.
The operation should be performed according to the following table:
entity alu is
a : in unsigned(3 downto 0);
b : in unsigned(3 downto 0);
s : in std_logic_vector(1 downto 0);
y : out unsigned(3 downto 0)
architecture synth of alu is
-- You've got this!